Serial To Parallel 74hc595

2020. 3. 2. 07:55카테고리 없음

IntroductionHD44780 based character LCDs require at least 6 I/O lines from microcontroller to display data. Therefore, they are not suitable for low-pin microcontrollers like PIC12F series microchips. In this project, I am going to show how to drive an HD44780 based LCD display with only 3 pins of a microcontroller. I am going to demonstrate it with PIC12F683 microchip. The character data and command from the microcontroller is transferred serially to a shift register (74HC595), and the parallel output from the shift register is fed to LCD pins. About 74HC59574HC595 is a high-speed 8-bit serial in, serial or parallel-out shift register with a storage register and 3-state outputs.The shift register and storage registers have separate clocks, SHCP and STCP respectively. Data in the shift register is shifted on the positive-going transitions of SHCP, and the content of shift register will be transferred to the storage register on a positive-going transition of the STCP.

Serial To Parallel 74hc595

If we tie both the clocks together, the shift register will always be one clock ahead of the storage register. The 8-bit data of the storage register will appear at the parallel output (Q0-Q7) when the output enable (OE) is low.In this project, SHCP and STCP are tied together. So, if we want to receive a serially transferred 8-bit into parallel form at Q0-Q7, an extra clock pulse is required after transmitting the 8-th bit of serial data because the clocks are tied and the storage register is 1-clock behind the shift register. HD44780-based character LCDAll HD44780 based character LCD displays are connected using 14 wires: 8 data lines (D0-D7), 3 control lines (RS, E, R/W), and three power lines (Vdd, Vss, Vee). Some LCDs may have LED backlight and so they may have additional connections (usually two: LED+ and LED-).

The 74HC595; 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register.

Serial To Parallel 74hc595 Download

Serial To Parallel Shifting-out With A 74hc595

Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input ( OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state.

Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V CC.